1. Field of the Invention
This invention is directed to a one time programmable Read Only Memory (ROM) which is used for code development and can be implemented in a standard CMOS process with a limited number of additional processing steps. Anti-fuse technology is used as the programming element for the ROM.
2. Prior Art
The most cost effective, high volume production non-volatile memory used principally for program or instruction storage is the mask programmable Read Only Memory (ROM). The mask programmable ROM is dense, offers high access speed, and requires no special processing steps when used in standard MOS logic processes. However, it has two serious disadvantages. They are
1. High re-programming cost. Reprogramming requires generation of a mask and the processing of at least a few wafers for code verification. The re-programming cost can easily cost over $10,000. PA1 2. Poor re-programming turn around time. As mentioned in 1, reprogramming requires generation of a mask and subsequent integrated circuit processing which can take a few weeks. PA1 1. The need to make two versions of a chip. The amount of layout and design effort needed to make two versions is costly and consumes design resources. PA1 2. Speed issues. External PROMs are inherently much slower than internal mask programmable ROM. Typically, an emulator chip cannot perform at speed. PA1 3. Final package incompatibility. The "emulator" chip with its external PROM not only runs slower but is in a different package than the production ROM version of the part. PA1 1. Simple process additions over existing logic CMOS process. Ideally, it is desired that only a few simple process additions be made to the CMOS logic process with as few new masking steps as possible. Furthermore, it is desired not to introduce high voltage transistors into the process if possible. PA1 2. High read speed. The read speed of the PROM should be comparable to the read speed of the metal mask ROM. PA1 3. Small additional write circuitry. The PROM should introduce a negligible amount of write circuitry which the mask version of the ROM does not require. PA1 4. Instant conversion to mask ROM. Once the program code is stable and the part is ready for production then it is desired that the PROM be converted to mask ROM without any re-layout of the chip. Ideally, only the contact mask layer should be generated for the masked, production ROM. PA1 5. The embedded PROM technology should be scaleable.
The high cost of re-programming a ROM and the poor turn around can result in high chip development cost and costly "time to market" delays. Given the program complexity of today's micro-controllers and DSPs, repeated changes to program code or software is common.
One solution has been to develop emulator chips. These chips remove the ROM and port the ROM addresses, control, and data I/O to chip pins for interface to an external Programmable Read Only Memory or PROM. This approach also has some short comings including
Another method used for code development is embedded flash memory. Unfortunately, adding flash ROM can triple the cost of a die. Furthermore, flash has slower access times than metal mask ROM and consumes more die area. Embedding flash memory into a CMOS process requires that a significant number of masking steps be added to the process. Furthermore, testing flash memory is slow and expensive. Thus, flash is not nearly as cost effective as mask ROM for applications having high part volumes and no need for field programming up-dates.
Yet another method that may be used for code development is based on fuse or anti-fuse technology. Because of a reduced current requirement for programmning the cell, anti-fuse technology has been preferred over fuse technology for MOS based memories. Anti-fuse technology uses an insulating element in the contact of an addressable cell which can be shorted by passing a relatively high voltage and current through the insulating element thereby causing a rupture or short and thus, a state change from an insulating element to a conductive element. Insulators include oxide (SiO.sub.2), silicon nitride (Si.sub.3 N.sub.4), various combinations of oxides and nitrides, polysilicon, and amorphous silicon. These types of memories are used in permanent applications requiring reliability and, therefore, need special high voltage transistors to program the cells. The addition of these special transistors to the process adds to its cost and are not required for reading the memory.